2020-02-14 18:44:57 +01:00
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x
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2019-08-09 21:18:26 +02:00
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2019-10-11 21:35:37 +02:00
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/* travail du 11/10/2019 modification pour 32 entrées
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2019-09-20 21:56:16 +02:00
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| port A | Broche | note | MIDI hex |
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| -------- | -------- | -------- | -------- |
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| A0 | 22 | C2 | 24 |
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2019-10-11 21:35:37 +02:00
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| A1 | 23 | C2# | 25 |
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| A2 | 24 | D2 | 26 |
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| A3 | 25 | D2# | 27 |
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| A4 | 26 | E2 | 28 |
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| A5 | 27 | F2 | 29 |
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| A6 | 28 | F2# | 2A |
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| A7 | 29 | G2 | 2B |
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| port B | Broche | note | MIDI hex |
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| -------- | -------- | -------- | -------- |
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| B0 | 53 | G2# | 2C |
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| B1 | 52 | A2 | 2D |
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| B2 | 51 | A2# | 2E |
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| B3 | 50 | B2 | 2F |
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| B6 | 12 | D3 | 32 |
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| B7 | 13 | D3# | 33 |
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| port C | Broche | note | MIDI hex |
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| -------- | -------- | -------- | -------- |
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| C0 | 37 | E3 | 34 |
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| C1 | 36 | F3 | 35 |
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| C2 | 35 | F3# | 36 |
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| C3 | 34 | G3 | 37 |
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| C4 | 33 | G3# | 38 |
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| C5 | 32 | A3 | 39 |
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| C6 | 31 | A3# | 3A |
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| C7 | 30 | B3 | 3B |
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| port L | Broche | note | MIDI hex |
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| -------- | -------- | -------- | -------- |
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| L0 | 49 | C4 | 3C |
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| L1 | 48 | C4# | 3D |
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| L2 | 47 | D4 | 3E |
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| L3 | 46 | D4# | 3F |
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| L4 | 45 | E4 | 40 |
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| L5 | 44 | F4 | 41 |
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| L6 | 43 | F4# | 42 |
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| L7 | 42 | G4 | 43 |
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2019-09-20 21:56:16 +02:00
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*/
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2019-10-04 17:43:24 +02:00
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2019-10-04 21:26:18 +02:00
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const int Masque1 = B00000001 ;
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const int Masque2 = B00000010 ;
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const int Masque4 = B00000100 ;
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const int Masque8 = B00001000 ;
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const int Masque16 = B00010000 ;
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const int Masque32 = B00100000 ;
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const int Masque64 = B01000000 ;
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const int Masque128 = B10000000 ;
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2019-10-04 17:43:24 +02:00
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2020-01-31 20:34:09 +01:00
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int RegistreA ; /* initialisation registre A */
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int RegistreB ; /* initialisation registre B */
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int RegistreC ; /* initialisation registre C */
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int RegistreL ; /* initialisation registre L */
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2019-10-04 17:43:24 +02:00
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2019-12-27 20:53:52 +01:00
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/* variable pour l'utilisation du port A */
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2019-10-04 17:43:24 +02:00
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2019-12-27 20:53:52 +01:00
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int EPA0 = B00000001 ; /* Etat A0 du Port A */
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2019-10-11 21:35:37 +02:00
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int EPA1 = B00000010 ; //
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int EPA2 = B00000100 ; //
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int EPA3 = B00001000 ; //
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int EPA4 = B00010000 ; //
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int EPA5 = B00100000 ; //
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int EPA6 = B01000000 ; //
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int EPA7 = B10000000 ; //
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2019-10-04 17:43:24 +02:00
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2020-01-31 20:34:09 +01:00
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int DePA0 = B00000001 ; /* Dernier etat de A0 du port A */ //
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int DePA1 = B00000010 ; //
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int DePA2 = B00000100 ; //
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int DePA3 = B00001000 ; //
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int DePA4 = B00010000 ; //
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int DePA5 = B00100000 ; //
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int DePA6 = B01000000 ; //
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int DePA7 = B10000000 ; //
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2019-10-04 21:26:18 +02:00
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2019-10-11 21:35:37 +02:00
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int EPB0 = B00000001 ; /* variable pour l'utilisation du port B */
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int EPB1 = B00000010 ; //
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int EPB2 = B00000100 ; //
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int EPB3 = B00001000 ; //
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int EPB4 = B00010000 ; //
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int EPB5 = B00100000 ; //
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int EPB6 = B01000000 ; //
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int EPB7 = B10000000 ; //
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2020-01-31 20:34:09 +01:00
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int DePB0 = B00000001 ; //
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int DePB1 = B00000010 ; //
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int DePB2 = B00000100 ; //
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int DePB3 = B00001000 ; //
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int DePB4 = B00010000 ; //
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int DePB5 = B00100000 ; //
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int DePB6 = B01000000 ; //
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int DePB7 = B10000000 ; //
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2019-10-11 21:35:37 +02:00
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int EPC0 = B00000001 ; /* variable pour l'utilisation du port C */
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int EPC1 = B00000010 ; //
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int EPC2 = B00000100 ; //
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int EPC3 = B00001000 ; //
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int EPC4 = B00010000 ; //
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int EPC5 = B00100000 ; //
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int EPC6 = B01000000 ; //
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int EPC7 = B10000000 ; //
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2020-01-31 20:34:09 +01:00
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int DePC0 = B00000001 ; //
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int DePC1 = B00000010 ; //
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int DePC2 = B00000100 ; //
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int DePC3 = B00001000 ; //
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int DePC4 = B00010000 ; //
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int DePC5 = B00100000 ; //
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int DePC6 = B01000000 ; //
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int DePC7 = B10000000 ; //
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2019-10-11 21:35:37 +02:00
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int EPL0 = B00000001 ; /* variable pour l'utilisation du port L */
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int EPL1 = B00000010 ; //
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int EPL2 = B00000100 ; //
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int EPL3 = B00001000 ; //
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int EPL4 = B00010000 ; //
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int EPL5 = B00100000 ; //
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int EPL6 = B01000000 ; //
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int EPL7 = B10000000 ; //
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2020-01-31 20:34:09 +01:00
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int DePL0 = B00000001 ; //
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int DePL1 = B00000010 ; //
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int DePL2 = B00000100 ; //
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int DePL3 = B00001000 ; //
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int DePL4 = B00010000 ; //
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int DePL5 = B00100000 ; //
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int DePL6 = B01000000 ; //
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int DePL7 = B10000000 ; //
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2019-10-11 21:35:37 +02:00
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2019-10-18 21:48:59 +02:00
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void noteOn(int cmd, int pitch, int velocity) /* plays a MIDI note. Doesn't check to see that cmd is greater than 127,
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or that data values are less than 127 */
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{
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2020-01-31 20:34:09 +01:00
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Serial1.write(cmd);
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Serial1.write(pitch);
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Serial1.write(velocity);
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2019-10-18 21:48:59 +02:00
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}
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2019-10-11 21:35:37 +02:00
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2019-08-16 21:51:50 +02:00
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2019-08-09 21:18:26 +02:00
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2019-08-09 21:36:53 +02:00
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void setup()
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2019-08-09 21:18:26 +02:00
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{
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2019-10-11 21:35:37 +02:00
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pinMode(22,INPUT); /* port A */
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2019-10-04 17:43:24 +02:00
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pinMode(23,INPUT);
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2019-08-09 21:18:26 +02:00
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pinMode(24,INPUT);
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2019-08-16 21:51:50 +02:00
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pinMode(25,INPUT);
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2019-08-09 21:18:26 +02:00
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pinMode(26,INPUT);
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2019-08-16 21:51:50 +02:00
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pinMode(27,INPUT);
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2019-08-09 21:18:26 +02:00
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pinMode(28,INPUT);
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2019-10-11 21:35:37 +02:00
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pinMode(29,INPUT);
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pinMode(53,INPUT); /* port B */
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pinMode(52,INPUT);
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pinMode(51,INPUT);
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pinMode(50,INPUT);
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pinMode(10,INPUT);
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pinMode(11,INPUT);
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pinMode(12,INPUT);
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pinMode(13,INPUT);
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pinMode(37,INPUT); /* port C */
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pinMode(36,INPUT);
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pinMode(35,INPUT);
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pinMode(34,INPUT);
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pinMode(33,INPUT);
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pinMode(32,INPUT);
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pinMode(31,INPUT);
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pinMode(30,INPUT);
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2019-10-04 21:26:18 +02:00
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2019-10-11 21:35:37 +02:00
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pinMode(49,INPUT); /* port L */
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pinMode(48,INPUT);
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pinMode(47,INPUT);
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pinMode(46,INPUT);
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pinMode(45,INPUT);
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pinMode(44,INPUT);
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pinMode(43,INPUT);
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pinMode(42,INPUT);
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2019-10-04 21:26:18 +02:00
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2019-10-04 17:43:24 +02:00
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2019-08-16 21:51:50 +02:00
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2020-01-31 20:34:09 +01:00
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2019-10-11 21:35:37 +02:00
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/* DDRA = B11111111 ; /* initialisation du port A en entré sur toutes les broches */ /* NE FONCTIONNE PAS ! */
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/* DDRB = B11111111 ; /* initialisation du port B en entré sur toutes les broches */
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/* DDRC = B11111111 ; /* initialisation du port C en entré sur toutes les broches */
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/* DDRL = B11111111 ; /* initialisation du port L en entré sur toutes les broches */
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2019-08-16 21:51:50 +02:00
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2020-01-31 20:34:09 +01:00
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Serial1.begin(31250); /* initialisation du port serie 2 broche 16 au debit MIDI */
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2019-10-04 21:26:18 +02:00
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2020-01-31 20:34:09 +01:00
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/* boucle d'extinction des notes */
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/* for (int i=0x24 ; i<= 0x43 ; i++ )
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2019-10-11 21:35:37 +02:00
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{
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noteOn( 0x80, i , 0x00 ) ;
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2019-10-18 21:48:59 +02:00
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}
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2020-01-31 20:34:09 +01:00
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delay(2000); */
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}
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2019-08-09 21:18:26 +02:00
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2019-12-27 20:53:52 +01:00
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/*EXEMPLE INITIAL
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2019-10-04 21:26:18 +02:00
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void noteOn(int cmd, int pitch, int velocity) /* plays a MIDI note. Doesn't check to see that cmd is greater than 127,
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or that data values are less than 127 */
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2019-10-18 21:48:59 +02:00
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/*
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2019-10-04 21:26:18 +02:00
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{
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Serial.write(cmd);
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Serial.write(pitch);
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Serial.write(velocity);
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}
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2019-10-18 21:48:59 +02:00
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*/
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2019-10-04 21:26:18 +02:00
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2019-09-20 21:56:16 +02:00
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void loop()
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2019-08-09 21:18:26 +02:00
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{
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2019-09-20 21:56:16 +02:00
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2020-01-31 20:34:09 +01:00
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2019-10-04 21:26:18 +02:00
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RegistreA = PINA ; /* lecture du port A */
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2019-10-11 21:35:37 +02:00
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RegistreB = PINB ; /* lecture du port B */
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RegistreC = PINC ; /* lecture du port C */
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RegistreL = PINL ; /* lecture du port L */
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2019-09-20 21:56:16 +02:00
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2019-10-11 21:35:37 +02:00
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EPA0 = RegistreA & Masque1 ; /* gestion du port A */
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2019-10-04 21:26:18 +02:00
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EPA1 = RegistreA & Masque2 ;
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EPA2 = RegistreA & Masque4 ;
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EPA3 = RegistreA & Masque8 ;
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EPA4 = RegistreA & Masque16 ;
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EPA5 = RegistreA & Masque32 ;
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EPA6 = RegistreA & Masque64 ;
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EPA7 = RegistreA & Masque128 ;
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2019-09-20 21:56:16 +02:00
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2020-02-14 18:44:57 +01:00
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if ( ( EPA0 == 0 ) && ( DePA0 == 1 ) ) { noteOn(0x90, 0x24 , 0x70 ) ; } /* si etat A0=0 et Dernier etat A0=1 , jouer la note */
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2019-10-11 21:35:37 +02:00
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if ( ( EPA0 == 1 ) && ( DePA0 == 0 ) ) { noteOn(0x80, 0x24 , 0x00 ) ;}
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2019-10-18 21:48:59 +02:00
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if ( ( EPA1 == 0 ) && ( DePA1 == Masque2 ) ) {noteOn(0x90, 0x25 , 0x70 ) ;}
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if ( ( EPA1 == Masque2 ) && ( DePA1 == 0 ) ) {noteOn(0x80, 0x25 , 0x00 ) ;}
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2019-10-11 21:35:37 +02:00
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if ( ( EPA2 == 0 ) && ( DePA2 == Masque4 ) ) { noteOn(0x90, 0x26 , 0x70 ) ;}
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if ( ( EPA2 == Masque4 ) && ( DePA2 == 0 ) ) { noteOn(0x80, 0x26 , 0x00 ) ; }
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if ( ( EPA3 == 0 ) && ( DePA3 == Masque8 ) ) { noteOn(0x90, 0x27 , 0x70 ) ;}
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if ( ( EPA3 == Masque8 ) && ( DePA3 == 0 ) ) {noteOn(0x80, 0x27 , 0x00 ) ;}
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if ( ( EPA4 == 0 ) && ( DePA4 == Masque16 ) ) { noteOn(0x90, 0x28 , 0x70 ) ;}
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if ( ( EPA4 == Masque16 ) && ( DePA4 == 0 ) ) { noteOn(0x80, 0x28 , 0x00 ) ;}
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if ( ( EPA5 == 0 ) && ( DePA5 == Masque32 ) ) { noteOn(0x90, 0x29 , 0x70 ) ;}
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if ( ( EPA5 == Masque32 ) && ( DePA5 == 0 ) ) { noteOn(0x80, 0x29 , 0x00 ) ;}
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if ( ( EPA6 == 0 ) && ( DePA6 == Masque64 ) ) { noteOn(0x90, 0x2A , 0x70 ) ;}
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if ( ( EPA6 == Masque64 ) && ( DePA6 == 0 ) ) { noteOn(0x80, 0x2A , 0x00 ) ;}
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if ( ( EPA7 == 0 ) && ( DePA7 == Masque128 ) ) { noteOn(0x90, 0x2B , 0x70 ) ;}
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if ( ( EPA7 == Masque128 ) && ( DePA7 == 0 ) ) { noteOn(0x80, 0x2B , 0x00 ) ;} /* fin de gestion du port A */
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EPB0 = RegistreB & Masque1 ; /* gestion du port B */
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EPB1 = RegistreB & Masque2 ;
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EPB2 = RegistreB & Masque4 ;
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EPB3 = RegistreB & Masque8 ;
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EPB4 = RegistreB & Masque16 ;
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EPB5 = RegistreB & Masque32 ;
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EPB6 = RegistreB & Masque64 ;
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EPB7 = RegistreB & Masque128 ;
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if ( ( EPB0 == 0 ) && ( DePB0 == 1 ) ) { noteOn(0x90, 0x2C , 0x70 ) ; } /* gestion du port B */
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if ( ( EPB0 == 1 ) && ( DePB0 == 0 ) ) { noteOn(0x80, 0x2C , 0x00 ) ;}
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2019-10-18 21:48:59 +02:00
|
|
|
if ( ( EPB1 == 0 ) && ( DePB1 == Masque2 ) ) { noteOn(0x90, 0x2D , 0x70 ) ;}
|
|
|
|
if ( ( EPB1 == Masque2 ) && ( DePB1 == 0 ) ) { noteOn(0x80, 0x2D , 0x00 ) ;}
|
2019-10-11 21:35:37 +02:00
|
|
|
|
|
|
|
if ( ( EPB2 == 0 ) && ( DePB2 == Masque4 ) ) { noteOn(0x90, 0x2E , 0x70 ) ;}
|
|
|
|
if ( ( EPB2 == Masque4 ) && ( DePB2 == 0 ) ) { noteOn(0x80, 0x2E , 0x00 ) ; }
|
|
|
|
|
|
|
|
if ( ( EPB3 == 0 ) && ( DePB3 == Masque8 ) ) { noteOn(0x90, 0x2F , 0x70 ) ;}
|
|
|
|
if ( ( EPB3 == Masque8 ) && ( DePB3 == 0 ) ) {noteOn(0x80, 0x2F , 0x00 ) ;}
|
|
|
|
|
|
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|
if ( ( EPB4 == 0 ) && ( DePB4 == Masque16 ) ) { noteOn(0x90, 0x30 , 0x70 ) ;}
|
|
|
|
if ( ( EPB4 == Masque16 ) && ( DePB4 == 0 ) ) { noteOn(0x80, 0x30 , 0x00 ) ;}
|
|
|
|
|
|
|
|
if ( ( EPB5 == 0 ) && ( DePB5 == Masque32 ) ) { noteOn(0x90, 0x31 , 0x70 ) ;}
|
|
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|
if ( ( EPB5 == Masque32 ) && ( DePB5 == 0 ) ) { noteOn(0x80, 0x31 , 0x00 ) ;}
|
|
|
|
|
|
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|
if ( ( EPB6 == 0 ) && ( DePB6 == Masque64 ) ) { noteOn(0x90, 0x32 , 0x70 ) ;}
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|
|
|
if ( ( EPB6 == Masque64 ) && ( DePB6 == 0 ) ) { noteOn(0x80, 0x32 , 0x00 ) ;}
|
|
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|
if ( ( EPB7 == 0 ) && ( DePB7 == Masque128 ) ) { noteOn(0x90, 0x33 , 0x70 ) ;}
|
|
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if ( ( EPB7 == Masque128 ) && ( DePB7 == 0 ) ) { noteOn(0x80, 0x33 , 0x00 ) ;} /* fin de gestion du port B */
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|
2019-10-04 21:26:18 +02:00
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|
2019-10-04 17:43:24 +02:00
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|
2019-10-11 21:35:37 +02:00
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|
EPC0 = RegistreC & Masque1 ; /* gestion du port C */
|
|
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EPC1 = RegistreC & Masque2 ;
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EPC2 = RegistreC & Masque4 ;
|
|
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|
EPC3 = RegistreC & Masque8 ;
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|
EPC4 = RegistreC & Masque16 ;
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|
EPC5 = RegistreC & Masque32 ;
|
|
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|
EPC6 = RegistreC & Masque64 ;
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|
|
|
EPC7 = RegistreC & Masque128 ;
|
|
|
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if ( ( EPC0 == 0 ) && ( DePC0 == 1 ) ) { noteOn(0x90, 0x34 , 0x70 ) ; } /* gestion du port C */
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if ( ( EPC0 == 1 ) && ( DePC0 == 0 ) ) { noteOn(0x80, 0x34 , 0x00 ) ;}
|
|
|
|
|
2019-10-18 21:48:59 +02:00
|
|
|
if ( ( EPC1 == 0 ) && ( DePC1 == Masque2 ) ) { noteOn(0x90, 0x35 , 0x70 ) ;}
|
|
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|
if ( ( EPC1 == Masque2 ) && ( DePC1 == 0 ) ) { noteOn(0x80, 0x35 , 0x00 ) ;}
|
2019-09-20 21:56:16 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPC2 == 0 ) && ( DePC2 == Masque4 ) ) { noteOn(0x90, 0x36 , 0x70 ) ;}
|
|
|
|
if ( ( EPC2 == Masque4 ) && ( DePC2 == 0 ) ) { noteOn(0x80, 0x36 , 0x00 ) ; }
|
2019-10-04 17:43:24 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPC3 == 0 ) && ( DePC3 == Masque8 ) ) { noteOn(0x90, 0x37 , 0x70 ) ;}
|
|
|
|
if ( ( EPC3 == Masque8 ) && ( DePC3 == 0 ) ) {noteOn(0x80, 0x37 , 0x00 ) ;}
|
2019-10-04 17:43:24 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPC4 == 0 ) && ( DePC4 == Masque16 ) ) { noteOn(0x90,0x38 , 0x70 ) ;}
|
|
|
|
if ( ( EPC4 == Masque16 ) && ( DePC4 == 0 ) ) { noteOn(0x80, 0x38 , 0x00 ) ;}
|
2019-10-04 17:43:24 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPC5 == 0 ) && ( DePC5 == Masque32 ) ) { noteOn(0x90, 0x39 , 0x70 ) ;}
|
|
|
|
if ( ( EPC5 == Masque32 ) && ( DePC5 == 0 ) ) { noteOn(0x80, 0x39 , 0x00 ) ;}
|
2019-10-04 17:43:24 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPC6 == 0 ) && ( DePC6 == Masque64 ) ) { noteOn(0x90, 0x3A , 0x70 ) ;}
|
|
|
|
if ( ( EPC6 == Masque64 ) && ( DePC6 == 0 ) ) { noteOn(0x80, 0x3A , 0x00 ) ;}
|
|
|
|
|
|
|
|
if ( ( EPC7 == 0 ) && ( DePC7 == Masque128 ) ) { noteOn(0x90, 0x3B , 0x70 ) ;}
|
|
|
|
if ( ( EPC7 == Masque128 ) && ( DePC7 == 0 ) ) { noteOn(0x80, 0x3B , 0x00 ) ;} /* fin de gestion du port C */
|
2019-10-04 17:43:24 +02:00
|
|
|
|
2019-10-04 21:26:18 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
|
|
|
|
EPL0 = RegistreL & Masque1 ; /* gestion du port L */
|
|
|
|
EPL1 = RegistreL & Masque2 ;
|
|
|
|
EPL2 = RegistreL & Masque4 ;
|
|
|
|
EPL3 = RegistreL & Masque8 ;
|
|
|
|
EPL4 = RegistreL & Masque16 ;
|
|
|
|
EPL5 = RegistreL & Masque32 ;
|
|
|
|
EPL6 = RegistreL & Masque64 ;
|
|
|
|
EPL7 = RegistreL & Masque128 ;
|
|
|
|
|
|
|
|
if ( ( EPL0 == 0 ) && ( DePL0 == 1 ) ) { noteOn(0x90, 0x3C , 0x70 ) ; } /* gestion du port L */
|
|
|
|
if ( ( EPL0 == 1 ) && ( DePL0 == 0 ) ) { noteOn(0x80, 0x3C , 0x00 ) ;}
|
2019-10-04 21:26:18 +02:00
|
|
|
|
2019-10-18 21:48:59 +02:00
|
|
|
if ( ( EPL1 == 0 ) && ( DePL1 == Masque2 ) ) {noteOn(0x90, 0x3D , 0x70 ) ; }
|
|
|
|
if ( ( EPL1 == Masque2 ) && ( DePL1 == 0 ) ){ noteOn(0x80, 0x3D , 0x00 ) ; }
|
2019-10-04 21:26:18 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPL2 == 0 ) && ( DePL2 == Masque4 ) ) { noteOn(0x90, 0x3E , 0x70 ) ;}
|
|
|
|
if ( ( EPL2 == Masque4 ) && ( DePL2 == 0 ) ) { noteOn(0x80, 0x3E , 0x00 ) ; }
|
|
|
|
|
|
|
|
if ( ( EPL3 == 0 ) && ( DePL3 == Masque8 ) ) { noteOn(0x90, 0x3F , 0x70 ) ;}
|
|
|
|
if ( ( EPL3 == Masque8 ) && ( DePL3 == 0 ) ) { noteOn(0x80, 0x3F , 0x00 ) ;}
|
|
|
|
|
|
|
|
if ( ( EPL4 == 0 ) && ( DePL4 == Masque16 ) ) { noteOn(0x90, 0x40 , 0x70 ) ;}
|
|
|
|
if ( ( EPL4 == Masque16 ) && ( DePL4 == 0 ) ) { noteOn(0x80, 0x40 , 0x00 ) ;}
|
2019-10-04 21:26:18 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPL5 == 0 ) && ( DePL5 == Masque32 ) ) { noteOn(0x90, 0x41 , 0x70 ) ;}
|
|
|
|
if ( ( EPL5 == Masque32 ) && ( DePL5 == 0 ) ) { noteOn(0x80, 0x41 , 0x00 ) ;}
|
|
|
|
|
|
|
|
if ( ( EPL6 == 0 ) && ( DePL6 == Masque64 ) ) { noteOn(0x90, 0x42 , 0x70 ) ;}
|
|
|
|
if ( ( EPL6 == Masque64 ) && ( DePL6 == 0 ) ) { noteOn(0x80, 0x42 , 0x00 ) ;}
|
2019-10-04 21:26:18 +02:00
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
if ( ( EPL7 == 0 ) && ( DePL7 == Masque128 ) ) { noteOn(0x90, 0x43 , 0x70 ) ;}
|
|
|
|
if ( ( EPL7 == Masque128 ) && ( DePL7 == 0 ) ) { noteOn(0x80, 0x43 , 0x00 ) ;} /* fin de gestion du port L */
|
|
|
|
|
2019-10-04 17:43:24 +02:00
|
|
|
|
|
|
|
|
|
|
|
|
2019-12-27 20:53:52 +01:00
|
|
|
/* port A */
|
|
|
|
DePA0 = EPA0 ; /* Dernier etat = etat : réinitialisation des etats avant rebouclage et lecture */
|
2019-10-04 17:43:24 +02:00
|
|
|
DePA1 = EPA1 ;
|
|
|
|
DePA2 = EPA2 ;
|
|
|
|
DePA3 = EPA3 ;
|
|
|
|
DePA4 = EPA4 ;
|
|
|
|
DePA5 = EPA5 ;
|
|
|
|
DePA6 = EPA6 ;
|
|
|
|
DePA7 = EPA7 ;
|
|
|
|
|
|
|
|
|
2019-10-11 21:35:37 +02:00
|
|
|
DePB0 = EPB0 ; /* port B */
|
|
|
|
DePB1 = EPB1 ;
|
|
|
|
DePB2 = EPB2 ;
|
|
|
|
DePB3 = EPB3 ;
|
|
|
|
DePB4 = EPB4 ;
|
|
|
|
DePB5 = EPB5 ;
|
|
|
|
DePB6 = EPB6 ;
|
|
|
|
DePB7 = EPB7 ;
|
|
|
|
|
|
|
|
DePC0 = EPC0 ; /* port C */
|
|
|
|
DePC1 = EPC1 ;
|
|
|
|
DePC2 = EPC2 ;
|
|
|
|
DePC3 = EPC3 ;
|
|
|
|
DePC4 = EPC4 ;
|
|
|
|
DePC5 = EPC5 ;
|
|
|
|
DePC6 = EPC6 ;
|
|
|
|
DePC7 = EPC7 ;
|
|
|
|
|
|
|
|
DePL0 = EPL0 ; /* port L */
|
|
|
|
DePL1 = EPL1 ;
|
|
|
|
DePL2 = EPL2 ;
|
|
|
|
DePL3 = EPL3 ;
|
|
|
|
DePL4 = EPL4 ;
|
|
|
|
DePL5 = EPL5 ;
|
|
|
|
DePL6 = EPL6 ;
|
|
|
|
DePL7 = EPL7 ;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2019-10-04 17:43:24 +02:00
|
|
|
|
|
|
|
|
2019-09-20 21:56:16 +02:00
|
|
|
/* FIN */
|
2019-08-16 21:51:50 +02:00
|
|
|
|
2019-10-04 21:26:18 +02:00
|
|
|
|
|
|
|
}
|