472 lines
25 KiB
C++
472 lines
25 KiB
C++
/**
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* MFRC522_I2C.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS
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*I2C BY AROZCAN MFRC522_I2C.h - Based on ARDUINO RFID MODULE KIT 13.56 MHZ WITH
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*TAGS SPI Library BY COOQROBOT. Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
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* Created by Miguel Balboa (circuitito.com), Jan, 2012.
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* Rewritten by Søren Thing Andersen (access.thing.dk), fall of 2013
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*(Translation to English, refactored, comments, anti collision, cascade
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*levels.) Extended by Tom Clement with functionality to write to sector 0 of
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*UID changeable Mifare cards. Extended by Ahmet Remzi Ozcan with I2C
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*functionality. Author: arozcan @
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*https://github.com/arozcan/MFRC522-I2C-Library Released into the public
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*domain.
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*
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* Please read this file for an overview and then MFRC522.cpp for comments on
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*the specific functions. Search for "mf-rc522" on ebay.com to purchase the
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*MF-RC522 board.
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*
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* There are three hardware components involved:
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* 1) The micro controller: An Arduino
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* 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless
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*Reader IC 3) The PICC (short for Proximity Integrated Circuit Card): A card or
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*tag using the ISO 14443A interface, eg Mifare or NTAG203.
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*
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* The microcontroller and card reader uses I2C for communication.
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* The protocol is described in the MFRC522 datasheet:
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*http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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*
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* The card reader and the tags communicate using a 13.56MHz electromagnetic
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*field. The protocol is defined in ISO/IEC 14443-3 Identification cards --
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*Contactless integrated circuit cards -- Proximity cards -- Part 3:
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*Initialization and anticollision". A free version of the final draft can be
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*found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf Details are
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*found in chapter 6, Type A – Initialization and anticollision.
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*
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* If only the PICC UID is wanted, the above documents has all the needed
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*information. To read and write from MIFARE PICCs, the MIFARE protocol is used
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*after the PICC has been selected. The MIFARE Classic chips and protocol is
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*described in the datasheets: 1K:
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*http://www.nxp.com/documents/data_sheet/MF1S503x.pdf 4K:
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*http://www.nxp.com/documents/data_sheet/MF1S703x.pdf Mini:
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*http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf The MIFARE
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*Ultralight chip and protocol is described in the datasheets: Ultralight:
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*http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf Ultralight C:
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*http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
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*
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* MIFARE Classic 1K (MF1S503x):
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* Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
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* The blocks are numbered 0-63.
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* Block 3 in each sector is the Sector Trailer. See
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*http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
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* Bytes 0-5: Key A
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* Bytes 6-8: Access Bits
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* Bytes 9: User data
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* Bytes 10-15: Key B (or user data)
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* Block 0 is read-only manufacturer data.
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* To access a block, an authentication using a key from the block's sector
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*must be performed first. Example: To read from block 10, first authenticate
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*using a key from sector 3 (blocks 8-11). All keys are set to FFFFFFFFFFFFh at
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*chip delivery. Warning: Please read section 8.7 "Memory Access". It includes
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*this text: if the PICC detects a format violation the whole sector is
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*irreversibly blocked. To use a block in "value block" mode (for
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*Increment/Decrement operations) you need to change the sector trailer. Use
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*PICC_SetAccessBits() to calculate the bit patterns. MIFARE Classic 4K
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*(MF1S703x): Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector)
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** 16 bytes/block = 4096 bytes. The blocks are numbered 0-255. The last block
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*in each sector is the Sector Trailer like above. MIFARE Classic Mini (MF1 IC
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*S20): Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes. The blocks
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*are numbered 0-19. The last block in each sector is the Sector Trailer like
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*above.
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*
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* MIFARE Ultralight (MF0ICU1):
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* Has 16 pages of 4 bytes = 64 bytes.
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* Pages 0 + 1 is used for the 7-byte UID.
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* Page 2 contains the last check digit for the UID, one byte manufacturer
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*internal data, and the lock bytes (see
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*http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) Page 3 is
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*OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. Pages
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*4-15 are read/write unless blocked by the lock bytes in page 2. MIFARE
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*Ultralight C (MF0ICU2): Has 48 pages of 4 bytes = 192 bytes. Pages 0 + 1 is
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*used for the 7-byte UID. Page 2 contains the last check digit for the UID, one
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*byte manufacturer internal data, and the lock bytes (see
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*http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) Page 3 is
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*OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. Pages
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*4-39 are read/write unless blocked by the lock bytes in page 2. Page 40 Lock
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*bytes Page 41 16 bit one way counter Pages 42-43 Authentication configuration
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* Pages 44-47 Authentication key
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*/
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#ifndef MFRC522_h
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#define MFRC522_h
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#include <Arduino.h>
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#include <Wire.h>
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// Firmware data for self-test
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// Reference values based on firmware version
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// Hint: if needed, you can remove unused self-test data to save flash memory
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//
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// Version 0.0 (0x90)
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// Philips Semiconductors; Preliminary Specification Revision 2.0 - 01 August
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// 2005; 16.1 Sefttest
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const byte MFRC522_firmware_referenceV0_0[] PROGMEM = {
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0x00, 0x87, 0x98, 0x0f, 0x49, 0xFF, 0x07, 0x19, 0xBF, 0x22, 0x30,
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0x49, 0x59, 0x63, 0xAD, 0xCA, 0x7F, 0xE3, 0x4E, 0x03, 0x5C, 0x4E,
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0x49, 0x50, 0x47, 0x9A, 0x37, 0x61, 0xE7, 0xE2, 0xC6, 0x2E, 0x75,
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0x5A, 0xED, 0x04, 0x3D, 0x02, 0x4B, 0x78, 0x32, 0xFF, 0x58, 0x3B,
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0x7C, 0xE9, 0x00, 0x94, 0xB4, 0x4A, 0x59, 0x5B, 0xFD, 0xC9, 0x29,
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0xDF, 0x35, 0x96, 0x98, 0x9E, 0x4F, 0x30, 0x32, 0x8D};
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// Version 1.0 (0x91)
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// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
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const byte MFRC522_firmware_referenceV1_0[] PROGMEM = {
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0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C, 0xC2, 0xD8, 0x7C,
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0x4D, 0xD9, 0x70, 0xC7, 0x73, 0x10, 0xE6, 0xD2, 0xAA, 0x5E, 0xA1,
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0x3E, 0x5A, 0x14, 0xAF, 0x30, 0x61, 0xC9, 0x70, 0xDB, 0x2E, 0x64,
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0x22, 0x72, 0xB5, 0xBD, 0x65, 0xF4, 0xEC, 0x22, 0xBC, 0xD3, 0x72,
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0x35, 0xCD, 0xAA, 0x41, 0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E,
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0x02, 0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79};
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// Version 2.0 (0x92)
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// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
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const byte MFRC522_firmware_referenceV2_0[] PROGMEM = {
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0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0xD0, 0xE3, 0x0D,
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0x3D, 0x27, 0x89, 0x5C, 0xDE, 0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B,
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0x89, 0x82, 0x51, 0x3A, 0xEB, 0x02, 0x0C, 0xA5, 0x00, 0x49, 0x7C,
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0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81, 0x5D, 0x48, 0x76, 0xD5,
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0x71, 0x61, 0x21, 0xA9, 0x86, 0x96, 0x83, 0x38, 0xCF, 0x9D, 0x5B,
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0x6D, 0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F};
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// Clone
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// Fudan Semiconductor FM17522 (0x88)
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const byte FM17522_firmware_reference[] PROGMEM = {
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0x00, 0xD6, 0x78, 0x8C, 0xE2, 0xAA, 0x0C, 0x18, 0x2A, 0xB8, 0x7A,
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0x7F, 0xD3, 0x6A, 0xCF, 0x0B, 0xB1, 0x37, 0x63, 0x4B, 0x69, 0xAE,
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0x91, 0xC7, 0xC3, 0x97, 0xAE, 0x77, 0xF4, 0x37, 0xD7, 0x9B, 0x7C,
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0xF5, 0x3C, 0x11, 0x8F, 0x15, 0xC3, 0xD7, 0xC1, 0x5B, 0x00, 0x2A,
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0xD0, 0x75, 0xDE, 0x9E, 0x51, 0x64, 0xAB, 0x3E, 0xE9, 0x15, 0xB5,
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0xAB, 0x56, 0x9A, 0x98, 0x82, 0x26, 0xEA, 0x2A, 0x62};
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class MFRC522 {
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public:
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// MFRC522 registers. Described in chapter 9 of the datasheet.
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enum PCD_Register {
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// Page 0: Command and status
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// 0x00 // reserved for future use
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CommandReg = 0x01, // starts and stops command execution
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ComIEnReg = 0x02, // enable and disable interrupt request control bits
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DivIEnReg = 0x03, // enable and disable interrupt request control bits
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ComIrqReg = 0x04, // interrupt request bits
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DivIrqReg = 0x05, // interrupt request bits
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ErrorReg = 0x06, // error bits showing the error status of the last
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// command executed
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Status1Reg = 0x07, // communication status bits
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Status2Reg = 0x08, // receiver and transmitter status bits
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FIFODataReg = 0x09, // input and output of 64 byte FIFO buffer
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FIFOLevelReg = 0x0A, // number of bytes stored in the FIFO buffer
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WaterLevelReg = 0x0B, // level for FIFO underflow and overflow warning
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ControlReg = 0x0C, // miscellaneous control registers
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BitFramingReg = 0x0D, // adjustments for bit-oriented frames
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CollReg = 0x0E, // bit position of the first bit-collision detected on
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// the RF interface
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// 0x0F // reserved for future use
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// Page 1: Command
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// 0x10 // reserved for future use
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ModeReg = 0x11, // defines general modes for transmitting and receiving
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TxModeReg = 0x12, // defines transmission data rate and framing
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RxModeReg = 0x13, // defines reception data rate and framing
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TxControlReg = 0x14, // controls the logical behavior of the antenna
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// driver pins TX1 and TX2
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TxASKReg = 0x15, // controls the setting of the transmission modulation
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TxSelReg = 0x16, // selects the internal sources for the antenna driver
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RxSelReg = 0x17, // selects internal receiver settings
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RxThresholdReg = 0x18, // selects thresholds for the bit decoder
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DemodReg = 0x19, // defines demodulator settings
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// 0x1A // reserved for future use
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// 0x1B // reserved for future use
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MfTxReg =
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0x1C, // controls some MIFARE communication transmit parameters
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MfRxReg =
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0x1D, // controls some MIFARE communication receive parameters
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// 0x1E // reserved for future use
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SerialSpeedReg =
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0x1F, // selects the speed of the serial UART interface
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// Page 2: Configuration
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// 0x20 // reserved for future use
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CRCResultRegH =
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0x21, // shows the MSB and LSB values of the CRC calculation
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CRCResultRegL = 0x22,
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// 0x23 // reserved for future use
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ModWidthReg = 0x24, // controls the ModWidth setting?
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// 0x25 // reserved for future use
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RFCfgReg = 0x26, // configures the receiver gain
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GsNReg = 0x27, // selects the conductance of the antenna driver pins
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// TX1 and TX2 for modulation
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CWGsPReg = 0x28, // defines the conductance of the p-driver output
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// during periods of no modulation
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ModGsPReg = 0x29, // defines the conductance of the p-driver output
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// during periods of modulation
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TModeReg = 0x2A, // defines settings for the internal timer
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TPrescalerReg = 0x2B, // the lower 8 bits of the TPrescaler value. The
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// 4 high bits are in TModeReg.
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TReloadRegH = 0x2C, // defines the 16-bit timer reload value
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TReloadRegL = 0x2D,
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TCounterValueRegH = 0x2E, // shows the 16-bit timer value
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TCounterValueRegL = 0x2F,
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// Page 3: Test Registers
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// 0x30 // reserved for future use
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TestSel1Reg = 0x31, // general test signal configuration
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TestSel2Reg = 0x32, // general test signal configuration
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TestPinEnReg = 0x33, // enables pin output driver on pins D1 to D7
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TestPinValueReg = 0x34, // defines the values for D1 to D7 when it is
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// used as an I/O bus
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TestBusReg = 0x35, // shows the status of the internal test bus
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AutoTestReg = 0x36, // controls the digital self test
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VersionReg = 0x37, // shows the software version
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AnalogTestReg = 0x38, // controls the pins AUX1 and AUX2
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TestDAC1Reg = 0x39, // defines the test value for TestDAC1
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TestDAC2Reg = 0x3A, // defines the test value for TestDAC2
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TestADCReg = 0x3B // shows the value of ADC I and Q channels
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// 0x3C // reserved for production tests
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// 0x3D // reserved for production tests
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// 0x3E // reserved for production tests
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// 0x3F // reserved for production tests
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};
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// MFRC522 commands. Described in chapter 10 of the datasheet.
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enum PCD_Command {
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PCD_Idle = 0x00, // no action, cancels current command execution
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PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
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PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
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PCD_CalcCRC =
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0x03, // activates the CRC coprocessor or performs a self test
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PCD_Transmit = 0x04, // transmits data from the FIFO buffer
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PCD_NoCmdChange = 0x07, // no command change, can be used to modify the
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// CommandReg register bits without affecting
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// the command, for example, the PowerDown bit
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PCD_Receive = 0x08, // activates the receiver circuits
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PCD_Transceive =
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0x0C, // transmits data from FIFO buffer to antenna and
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// automatically activates the receiver after transmission
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PCD_MFAuthent =
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0x0E, // performs the MIFARE standard authentication as a reader
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PCD_SoftReset = 0x0F // resets the MFRC522
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};
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// MFRC522 RxGain[2:0] masks, defines the receiver's signal voltage gain
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// factor (on the PCD). Described in 9.3.3.6 / table 98 of the datasheet at
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// http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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enum PCD_RxGain {
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RxGain_18dB = 0x00 << 4, // 000b - 18 dB, minimum
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RxGain_23dB = 0x01 << 4, // 001b - 23 dB
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RxGain_18dB_2 =
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0x02 << 4, // 010b - 18 dB, it seems 010b is a duplicate for 000b
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RxGain_23dB_2 =
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0x03 << 4, // 011b - 23 dB, it seems 011b is a duplicate for 001b
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RxGain_33dB = 0x04 << 4, // 100b - 33 dB, average, and typical default
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RxGain_38dB = 0x05 << 4, // 101b - 38 dB
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RxGain_43dB = 0x06 << 4, // 110b - 43 dB
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RxGain_48dB = 0x07 << 4, // 111b - 48 dB, maximum
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RxGain_min =
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0x00 << 4, // 000b - 18 dB, minimum, convenience for RxGain_18dB
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RxGain_avg =
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0x04 << 4, // 100b - 33 dB, average, convenience for RxGain_33dB
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RxGain_max =
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0x07 << 4 // 111b - 48 dB, maximum, convenience for RxGain_48dB
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};
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// Commands sent to the PICC.
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enum PICC_Command {
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// The commands used by the PCD to manage communication with several
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// PICCs (ISO 14443-3, Type A, section 6.4)
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PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in
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// state IDLE to go to READY and prepare for
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// anticollision or selection. 7 bit frame.
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PICC_CMD_WUPA =
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0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and
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// HALT to go to READY(*) and prepare for anticollision or
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// selection. 7 bit frame.
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PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used
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// during anti collision.
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PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
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PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 2
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PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 3
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PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC
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// to go to state HALT.
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// The commands used for MIFARE Classic (from
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// http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
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// Use PCD_MFAuthent to authenticate access to a sector, then use these
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// commands to read/write/modify the blocks on the sector.
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// The read/write commands can also be used for MIFARE Ultralight.
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PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
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PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
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PICC_CMD_MF_READ =
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0x30, // Reads one 16 byte block from the authenticated sector of
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// the PICC. Also used for MIFARE Ultralight.
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PICC_CMD_MF_WRITE =
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0xA0, // Writes one 16 byte block to the authenticated sector of
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// the PICC. Called "COMPATIBILITY WRITE" for MIFARE
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// Ultralight.
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PICC_CMD_MF_DECREMENT =
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0xC0, // Decrements the contents of a block and stores the result
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// in the internal data register.
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PICC_CMD_MF_INCREMENT =
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0xC1, // Increments the contents of a block and stores the result
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// in the internal data register.
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PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the
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// internal data register.
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PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal
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// data register to a block.
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// The commands used for MIFARE Ultralight (from
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// http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
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// The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for
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// MIFARE Ultralight.
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PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
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};
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// MIFARE constants that does not fit anywhere else
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enum MIFARE_Misc {
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MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other
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// value than 0xA is NAK.
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MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
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};
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// PICC types we can detect. Remember to update PICC_GetTypeName() if you
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// add more.
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enum PICC_Type {
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PICC_TYPE_UNKNOWN = 0,
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PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
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PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
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PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
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PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
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PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
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PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
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PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
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PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type
|
||
// Identification Procedure
|
||
PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
|
||
};
|
||
|
||
// Return codes from the functions in this class. Remember to update
|
||
// GetStatusCodeName() if you add more.
|
||
enum StatusCode {
|
||
STATUS_OK = 1, // Success
|
||
STATUS_ERROR = 2, // Error in communication
|
||
STATUS_COLLISION = 3, // Collission detected
|
||
STATUS_TIMEOUT = 4, // Timeout in communication.
|
||
STATUS_NO_ROOM = 5, // A buffer is not big enough.
|
||
STATUS_INTERNAL_ERROR =
|
||
6, // Internal error in the code. Should not happen ;-)
|
||
STATUS_INVALID = 7, // Invalid argument.
|
||
STATUS_CRC_WRONG = 8, // The CRC_A does not match
|
||
STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
|
||
};
|
||
|
||
// A struct used for passing the UID of a PICC.
|
||
typedef struct {
|
||
byte size; // Number of bytes in the UID. 4, 7 or 10.
|
||
byte uidByte[10];
|
||
byte sak; // The SAK (Select acknowledge) byte returned from the PICC
|
||
// after successful selection.
|
||
} Uid;
|
||
|
||
// A struct used for passing a MIFARE Crypto1 key
|
||
typedef struct {
|
||
byte keyByte[MF_KEY_SIZE];
|
||
} MIFARE_Key;
|
||
|
||
// Member variables
|
||
Uid uid; // Used by PICC_ReadCardSerial().
|
||
|
||
// Size of the MFRC522 FIFO
|
||
static const byte FIFO_SIZE = 64; // The FIFO is 64 bytes.
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for setting up the Arduino
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
MFRC522(byte chipAddress);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Basic interface functions for communicating with the MFRC522
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
void PCD_WriteRegister(byte reg, byte value);
|
||
void PCD_WriteRegister(byte reg, byte count, byte *values);
|
||
byte PCD_ReadRegister(byte reg);
|
||
void PCD_ReadRegister(byte reg, byte count, byte *values, byte rxAlign = 0);
|
||
void setBitMask(unsigned char reg, unsigned char mask);
|
||
void PCD_SetRegisterBitMask(byte reg, byte mask);
|
||
void PCD_ClearRegisterBitMask(byte reg, byte mask);
|
||
byte PCD_CalculateCRC(byte *data, byte length, byte *result);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for manipulating the MFRC522
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
void PCD_Init();
|
||
void PCD_Reset();
|
||
void PCD_AntennaOn();
|
||
void PCD_AntennaOff();
|
||
byte PCD_GetAntennaGain();
|
||
void PCD_SetAntennaGain(byte mask);
|
||
bool PCD_PerformSelfTest();
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for communicating with PICCs
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
byte PCD_TransceiveData(byte *sendData, byte sendLen, byte *backData,
|
||
byte *backLen, byte *validBits = NULL,
|
||
byte rxAlign = 0, bool checkCRC = false);
|
||
byte PCD_CommunicateWithPICC(byte command, byte waitIRq, byte *sendData,
|
||
byte sendLen, byte *backData = NULL,
|
||
byte *backLen = NULL, byte *validBits = NULL,
|
||
byte rxAlign = 0, bool checkCRC = false);
|
||
byte PICC_RequestA(byte *bufferATQA, byte *bufferSize);
|
||
byte PICC_WakeupA(byte *bufferATQA, byte *bufferSize);
|
||
byte PICC_REQA_or_WUPA(byte command, byte *bufferATQA, byte *bufferSize);
|
||
byte PICC_Select(Uid *uid, byte validBits = 0);
|
||
byte PICC_HaltA();
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for communicating with MIFARE PICCs
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
byte PCD_Authenticate(byte command, byte blockAddr, MIFARE_Key *key,
|
||
Uid *uid);
|
||
void PCD_StopCrypto1();
|
||
byte MIFARE_Read(byte blockAddr, byte *buffer, byte *bufferSize);
|
||
byte MIFARE_Write(byte blockAddr, byte *buffer, byte bufferSize);
|
||
byte MIFARE_Decrement(byte blockAddr, long delta);
|
||
byte MIFARE_Increment(byte blockAddr, long delta);
|
||
byte MIFARE_Restore(byte blockAddr);
|
||
byte MIFARE_Transfer(byte blockAddr);
|
||
byte MIFARE_Ultralight_Write(byte page, byte *buffer, byte bufferSize);
|
||
byte MIFARE_GetValue(byte blockAddr, long *value);
|
||
byte MIFARE_SetValue(byte blockAddr, long value);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Support functions
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
byte PCD_MIFARE_Transceive(byte *sendData, byte sendLen,
|
||
bool acceptTimeout = false);
|
||
// old function used too much memory, now name moved to flash; if you need
|
||
// char, copy from flash to memory
|
||
// const char *GetStatusCodeName(byte code);
|
||
const __FlashStringHelper *GetStatusCodeName(byte code);
|
||
byte PICC_GetType(byte sak);
|
||
// old function used too much memory, now name moved to flash; if you need
|
||
// char, copy from flash to memory
|
||
// const char *PICC_GetTypeName(byte type);
|
||
const __FlashStringHelper *PICC_GetTypeName(byte type);
|
||
void PICC_DumpToSerial(Uid *uid);
|
||
void PICC_DumpMifareClassicToSerial(Uid *uid, byte piccType,
|
||
MIFARE_Key *key);
|
||
void PICC_DumpMifareClassicSectorToSerial(Uid *uid, MIFARE_Key *key,
|
||
byte sector);
|
||
void PICC_DumpMifareUltralightToSerial();
|
||
void MIFARE_SetAccessBits(byte *accessBitBuffer, byte g0, byte g1, byte g2,
|
||
byte g3);
|
||
bool MIFARE_OpenUidBackdoor(bool logErrors);
|
||
bool MIFARE_SetUid(byte *newUid, byte uidSize, bool logErrors);
|
||
bool MIFARE_UnbrickUidSector(bool logErrors);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Convenience functions - does not add extra functionality
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
bool PICC_IsNewCardPresent();
|
||
bool PICC_ReadCardSerial();
|
||
|
||
private:
|
||
byte _chipAddress;
|
||
byte _resetPowerDownPin; // Arduino pin connected to MFRC522's reset and
|
||
// power down input (Pin 6, NRSTPD, active low)
|
||
byte MIFARE_TwoStepHelper(byte command, byte blockAddr, long data);
|
||
};
|
||
|
||
#endif |